The present invention relates to a multiple-output arbitrary waveform generator and a mixed LSI tester including the unit, particularly to a concurrent measurement technique of concurrently testing a plurality of devices.
An LSI test apparatus applies analog test signals to LSIs to be tested and performs a test based on a test sequence specific to a type of each LIS to be tested. The LSI test apparatus includes an arbitrary waveform generator in order to generate the analog test signals.
Here, a constitution of a conventional arbitrary waveform generator will be described with reference to FIG. 3.
As shown in FIG. 3(A), an arbitrary waveform generator 1 is constituted of an output sequence control section 11, output waveform data generation section 12, and analog waveform generation section 13.
The output sequence control section 11 outputs a test sequence signal S1 based on the test sequence specific to the type of an LSI to be tested (DUT) 3 to control the output waveform data generation section 12. The output waveform data generation section 12 generates an output waveform data signal S2 in accordance with the test sequence signal S1.
The analog waveform generation section 13 digital/analog-converts the waveform data signal S2 outputted from the output waveform data generation section 12, and generates an analog test signal S3. The analog test signal S3 is applied to the LSI to be tested (DUT) 3 laid on a performance board 2. The performance board 2 functions as an interface board (I/F board) with the DUT 3. The performance board 2 for exclusive use in each type of the LSI to be tested 3 is used.
Moreover, as shown in FIG. 3(B), the analog waveform generation section 13 includes a digital/analog converter (D/A) 41, a low pass filter (LPF) 42, an attenuator (ATT) 43, a differential section 44, and a digital/analog converter for offset (D/A) 45.
The output waveform data signal S2 inputted into the analog waveform generation section 13 is converted to an analog test signal by the digital/analog converter (D/A) 41. Subsequently, when this analog test signal is passed through the low pass filter (LPF) 42, high-frequency noise components are removed.
Now a signal amplitude (gain) of the analog test signal in this stage sometimes exceeds an allowable range of an input signal amplitude in the DUT 3. Then, the signal amplitude of the analog test signal is adjusted by the attenuator 43 so that the signal amplitude of the DUT 3 falls within the allowable range.
Subsequently, the differential section 44 generates a differential analog test signal constituted of positive and negative signals from the analog test signal.
Furthermore, for the DUT 3, there is an allowable range in an offset voltage of the input signal. Then, a DC offset signal S4 in the allowable range is digital/analog-converted by the digital/analog converter for offset 45 to generate an offset voltage V of the same phase as that of the differential analog test signal. Moreover, the offset voltage V is added to the differential analog test signal, and the offset-adjusted differential analog test signal is outputted via ports 40.
Accordingly, with respect to the LSI to be tested, the differential analog test signal whose gain and offset are optimized is inputted into the DUT 3.
In the LSI test apparatus constituted in this manner, in recent years, a test method called concurrent measurement has been used. In the method, a plurality of DUTs 3 are laid on the performance board 2, and are concurrently tested. When an LSI test is carried out by the concurrent measurement, the plurality of DUTs 3 can concurrently be tested, and a test time can be reduced.
However, there are dispersions with the DUTs 3 in a width of an allowable range of the input signal amplitude of the DUT 3 or an offset voltage allowable range. Therefore, in order to carry out the LSI test by the concurrent measurement, in general, as shown in FIG. 4(A), it is necessary to dispose the same number of arbitrary waveform generators 1, per performance board 2, as that of the LSIs to be tested laid on the performance board 2. As a result, there arises a problem that the LSI test apparatus is enlarged, and cost of the LSI test apparatus increases.
For example, in an example shown in FIG. 4(A), four systems of arbitrary waveform generators 1 are disposed in order to perform the concurrent measurement with respect to four DUTs 3.
Furthermore, when two types of analog test signals need to be applied to one DUT 3 in the LSI test, eight systems of arbitrary waveform generators 1 need to be disposed in order to perform the concurrent measurement of four DUTs. Therefore, the LSI test apparatus is further enlarged, and the cost increases.
To solve the problem, as shown in FIG. 4(B), a method of distributing the analog test signal S3 outputted from one arbitrary waveform generator 1 on the performance board 2 to apply the signals to the plurality of DUTs 3 has been proposed.
However; in this method, it is difficult to individually adjust the gains and offsets of the analog test signals in accordance with the allowable range of the individual DUTs 3. Therefore, there is a problem that it is difficult to apply the analog test signal optimized for each DUT 3.
Additionally, since it is necessary to control the distribution of the analog test signals on the performance board 2, the circuit configuration of the, performance board 2 is complicated, and a test program is also complicated.
The present invention has been developed to solve the above-described problem, and an object thereof is to provide a multiple-output arbitrary waveform generator in which the analog test-signal optimized for each LSI to be tested can be generated with a simple circuit configuration without complicating the circuit configuration of the performance board in concurrently testing the plurality of LSIs to be tested, and a mixed LSI tester including the generator.
According to the present invention, there is provided a multiple-output arbitrary waveform generator comprising: an output waveform data generation section for generating an output waveform data signal for an LSI test; an output sequence control section for controlling the output waveform data generation section based on a test sequence specific to an LSI to be tested; and an analog waveform generation section for digital/analog-converting an output waveform data signal outputted from the output waveform data generation section to apply the signals to a plurality of LSIs to be tested, wherein the analog-waveform generation section comprises: a gain adjustment section including a plurality of ports via which the analog test signals applied to the plurality of LSIs to be tested are individually outputted to individually adjust gains of the analog test signals outputted via the ports; and an offset adjustment section for individually adjusting offset voltages of the analog test signals.
Accordingly, the multiple-output arbitrary waveform generator of the present invention distributes the analog test signals in the analog waveform generation section, and outputs the signals via the plurality of ports. Therefore, even when the plurality of LSIs to be tested are tested by the concurrent measurement, the output sequence control section and output waveform data generation section can be constituted in one system.
Additionally, the distributed analog test signals are individually optimized for each LSI to be tested by the gain adjustment section and offset adjustment section of the analog waveform generation section.
Accordingly, when the plurality of LSIs to be tested are concurrently tested, the analog test signal optimized for each LSI to be tested can be generated with a simple circuit configuration.
Furthermore, in the present invention, since the analog test signals are distributed and optimized in the analog waveform generation section, the test signal can be optimized for each device to perform the concurrent measurement test without complicating the circuit configuration of the performance board and without complicating the test program.
Moreover, the multiple-output arbitrary waveform generator of the present invention is a multiple-output arbitrary waveform generator according to claim 1, and comprises a concurrent measurement handling register for selecting a port via which the analog test signal is outputted from all the ports.
When the concurrent measurement handling register is disposed in the multiple-output arbitrary waveform generator, an output port can be selected to select the number of LSIs to be tested by the concurrent measurement. That is, a specific LSI can be excluded from test objects.
Moreover, according to the present invention, there is provided a mixed LSI tester comprising: a multiple-output arbitrary waveform generator for generating an analog test signal based on a test sequence specific to a type of an LSI to be tested; and a performance board on which a plurality of LSIs to be tested including the analog test signals applied thereto are laid, wherein the arbitrary waveform generator comprises: an output waveform data generation section for generating an output waveform data signal for an LSI test; an output sequence control section for controlling the output waveform data generation section based on the test sequence specific to the LSI to be tested; and an analog waveform generation section for digital/analog-converting the output waveform data signal outputted from the output waveform data generation section to generate the analog test signals to be applied to the plurality of LSIs to be tested, and the analog waveform generation section comprises: a gain adjustment section comprising a plurality of ports via which the analog test signals to be applied to the plurality of LSIs to be tested are individually outputted to individually adjust gains of the analog test signals outputted via the ports; and an offset adjustment section for individually adjusting offset voltages of the analog test signals.
Accordingly, since the mixed LSI tester of the present invention comprises the multiple-output arbitrary waveform generator similar to that of claim 1, the analog test signal optimized for each LSI to be tested can be generated with a simple circuit configuration in concurrently testing the plurality of LSIs to be tested.